1. Field of the Invention
The present invention relates to a semiconductor device having a configuration in which a floating body type transistor is used as a path gate.
2. Description of Related Art
Conventionally, a planer type MOS transistor has been generally used as a transistor structure of a semiconductor device. Meanwhile, attention has recently been focused on a floating body type transistor as a transistor structure for achieving higher integration of the semiconductor device, in which a body between source and drain formed over a substrate via an insulating film operates in a floating state. For example, a transistor having a device structure such as SOI (Silicon on Insulator) structure, Fin-FET structure or pillar-shaped structure has been proposed as the floating body type transistor (for example, refer to Patent Reference 1).    [Patent Reference 1] Japanese Patent Application Laid-open No. 2003-68877 (U.S. Pat. No. 6,621,725)
In order to achieve high-speed operation by supplying a signal to a gate of a transistor used in the semiconductor device, a gate capacitance of the transistor is desired to be small as long as possible. However, the gate capacitance of the above-mentioned planer type transistor reaches the bottom when gate and source voltages are approximately equal to each other, and the transistor has C-V characteristics (relation between a gate-source voltage and the gate capacitance) with which the gate capacitance is increased even if the gate voltage changes upward or downward from this point. In other words, if the gate voltage is higher than the source voltage, a capacitance between a gate wiring and an inversion layer becomes dominant as viewed from the gate wiring, and if the gate voltage is lower than the source voltage, a capacitance between the gate wiring and a substrate becomes dominant as viewed from the gate wiring, in both of which the gate capacitance increases. In these cases, reducing the gate capacitance by controlling the gate voltage based on a relation with the source voltage is not so effective, which poses a problem that an effective control is difficult since the position of the above bottom fluctuates due to variations in manufacturing process, operation voltages and operating temperature. For example, when using a transistor as a path gate inserted in a signal path in the semiconductor device, there is a problem that proper control cannot be achieved in terms of reducing the gate capacitance and thus high-speed operation is hindered. There is the same problem when using the transistor in a logic circuit that requires the high-speed operation. Further, even when employing the above floating body type transistor in the semiconductor device, it is difficult to achieve the reduction in gate capacitance by the above-mentioned conventional method of the gate voltage.